Juha Plosila
Head of the Robotics and Autonomous Systems Unit
juplos@utu.fi +358 29 450 2621 +358 50 383 9453 Vesilinnantie 5 Turku ORCID identifier: https://orcid.org/0000-0003-4018-5495 |
autonomous systems; robotics; unmanned vehicles; drones; embedded systems; cyber physical systems; internet of things; smart systems; fog/edge computing; multi-agent systems; multiprocessors; network on chip; system on chip; multiprocessor system on chip; chip multiprocessors; heterogeneous systems; reconfigurable computing; digital circuits and systems; formal methods
Autonomous Systems Laboratory (ASL): https://asl.utu.fi/
Dr. Juha Plosila (born 1965) is Professor (full) in autonomous systems and robotics and the head of the Autonomous Systems Laboratory (ASL) research group (https://asl.utu.fi/) and Smart Systems (formerly Embedded Electronics) cost centre at the University of Turku (UTU) Department of Computing (formerly Department of Future Technologies) since 2019. He received his PhD in electronics and communication technology from UTU in 1999 and his Adjunct Professor (Docent) title in digital systems design in 2006. He held a 5-year position of Academy Research Fellow (Academy of Finland) in 2006-2011 and served as a senior University Lecturer in embedded computing at UTU in 2011-2018. During his tenure at UTU since 2000, he has led many externally funded research projects, supervised more than 20 PhD theses, and served in the management committees of several master's programmes. Plosila has been an active participant in the European Institute of Innovation and Technology (EIT) knowledge and innovation community EIT Digital since 2011, leading the EIT Digital Master Programme in Embedded Systems (a European double-degree programme with 6 partner universities) and representing UTU in the EIT Digital Finland Node Strategy Committee.
Plosila's current research interests include intelligent adaptive and reconfigurable multi-processing platforms, self-aware multi-agent monitoring and control, machine-learning and optimization, as well as application of heterogeneous energy efficient architectures to new computational challenges in the areas of cyber-physical systems and internet-of-things, with a special focus on autonomous multi-robot systems and fog/edge computing. He also has a strong background in network-on-chip design and formal mehods for system design and verification.
Google Scholar statistics: https://scholar.google.com/citations?user=em4kCrUAAAAJ&hl=en
Lecturer for 18 different courses since 1999 in the fields of digital circuit and system design, multiprocessor architectures, computer architectures, reconfigurable computing, embedded systems, modelling and verification, as well as autonomous systems:
Autonomous Systems Architectures, MSc-level, 5 ECTS (2019- ); Regonfigurable Computing, MSc-level, 5 ECTS (at Fudan University, China, 2013- ); Processor Architectures, BSc-level, 5 ECTS (2020); Computer Architectures and Operating Systems, BSc-level, 4 ECTS (2017-2019), Multiprocessor Architectures, MSc-level, 5 ECTS, (2006, -08, -10, 2012-2018); System on Chip Design, MSc-level, 5 ECTS (2015-2016); Seminar on Embedded Computing, MSc/PhD-level, 5 ECTS (2012-2014); Modelling Parallel Systems, MSc-level (2011); Formal System Modelling and Verification, MSc-level, 5 ECTS, (2008, -10); Post Graduate Course on Digital Circuit & System Design, PhD-level; 5 ECTS (2009); Advanced Multiprocessor Systems, MSc-level, 5 ECTS (2009); System Verification, MSc-level, 5 ECTS (2007); Computer Architectures, BSc-level, 7 ECTS (2006-2007); Asynchronous System Design, MSc-level, 5 ECTS (2003, -05, -07); Formal System Specification and Design, MSc-level; 10 ECTS (2004, -06); Digital Integrated Circuit Design, BSc-level, 7 ECTS (2000-2005); Digital Systems Engineering, MSc-level, 10 ECTS (2001, -02, -04); Principles of Digital Design, BSc-level, 5 ECTS (1999-2000, -04).
- ARB-NET: A Novel Adaptive Monitoring Platform for Stacked Mesh 3D NoC Architectures (2012)
- Design Automation Conference
(A4 Refereed article in a conference publication ) - Architectural modeling of pixel readout chips Velopix and Timepix3 (2012)
- Journal of Instrumentation
(A1 Refereed original research article in a scientific journal) - CATRA-Congestion Aware Trapezoid-based Routing Algorithm for On-Chip Networks (2012) Daneshtalab Masoud, Ebrahimi Masoumeh, Liljeberg Pasi, Plosila Juha, Tenhunen Hannu
(A4 Refereed article in a conference publication ) - Coarse and Fine-Grained Monitoring and Reconfiguration for Energy-Efficient NoCs (2012)
- International Symposium on System-on-Chip
(A4 Refereed article in a conference publication ) - CoNA: Dynamic application mapping for congestion reduction in many-core systems (2012) Computer Design (ICCD), 2012 IEEE 30th International Conference on Fattah M, Ramirez M, Daneshtalab M, Liljeberg P, Plosila J
(A4 Refereed article in a conference publication ) - Current Challenges in Embedded Communication Systems (2012) Innovations in Embedded and Real-Time Systems Engineering for Communication Isoaho Jouni, Virtanen Seppo, Plosila Juha
(A3 Refereed book chapter or chapter in a compilation book) - Design and Management of High-Performance, Reliable and Thermal-Aware 3D Networks-on-Chip (2012)
- IET Circuits, Devices and Systems
(A1 Refereed original research article in a scientific journal) - Dual Monitoring Communication for Self-Aware Network-on-Chip: Architecture and Case Study (2012)
- International Journal of Adaptive, Resilient and Autonomic Systems
(A1 Refereed original research article in a scientific journal) - Embedding Fault-Tolerance with Dual-Level Agents in Many-Core Systems (2012) Guang Liang, Bo Yang, Plosila Juha, Tenhunen Hannu, Syed M A H Jafri
(A4 Refereed article in a conference publication ) - Exploration of Heuristic Scheduling Algorithms for 3D Multicore Processors (2012) Proceedings of the 15th International Workshop on Software and Compilers for Embedded Systems (SCOPES) Thomas Canhao Xu, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
(A4 Refereed article in a conference publication ) - Exploring a Low-Cost and Power-Efficient Hybridization Technique for 3D NoC-Bus Hybrid Architecture Using LastZ-Based Routing Algorithms (2012)
- Journal of Low Power Electronics
(A1 Refereed original research article in a scientific journal) - Generic Monitoring and Management Infrastructure for 3D NoC-Bus Hybrid Architectures (2012) Rahmani Amir-Mohammad, Vaddina Kameswar Rao, Latif Khalid, Liljeberg Pasi, Plosila Juha, Tenhunen Hannu
(A4 Refereed article in a conference publication ) - GLB - Efficient Global Load Balancing Method for Moderating Congestion in On-Chip Networks (2012) Daneshtalab Masoud, Ebrahimi Masoumeh, Plosila Juha
(A4 Refereed article in a conference publication ) - HARAQ: Congestion-Aware Learning Model for Highly Adaptive Routing Algorithm in On-Chip Networks (2012) Daneshtalab Masoud, Ebrahimi Masoumeh, Farahnakian Fahimeh, Liljeberg Pasi, Plosila Juha, Palesi Maurizio, Tenhunen Hannu
(A4 Refereed article in a conference publication ) - High-Performance, Power-Aware and Reliable 3D NoC Architectures (2012)
- Design Automation Conference
(A4 Refereed article in a conference publication ) - Implementation and Analysis of Block Dense Matrix Decomposition on Network-on-Chips (2012) 2012 IEEE 14th International Conference on High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems Xu TC, Pahikkala T, Airola A, Liljeberg P, Plosila J, Salakoski T, Tenhunen H
(A4 Refereed article in a conference publication ) - Interaction of Hotspots in Advanced 3D Stacked Systems (2012) Vaddina Kameswar Rao, Latif Khalid, Rahmani Amir-Mohammad, Liljeberg Pasi, Plosila Juha
(A4 Refereed article in a conference publication ) - LEAR - A Low-weight and Highly Adaptive Routing Method for Distributing Congestions in On-Chip Networks (2012) Ebrahimi Masoumeh, Daneshtalab Masoud, Liljeberg Pasi, Plosila Juha, Tenhunen Hannu
(A4 Refereed article in a conference publication ) - Low-Cost Monitoring Platform for 3D Networks-on-Chip (2012) Rahmani Amir-Mohammad, Vaddina Kameswar Rao, Latif Khalid, Liljeberg Pasi, Plosila Juha, Tenhunen Hannu
(A4 Refereed article in a conference publication ) - MAFA: Adaptive Fault-Tolerant Routing Algorithm for Networks-on-Chip (2012)
- Digital System Design
(A4 Refereed article in a conference publication )