Exploring NoC jitter effect on simulation of spiking neural networks




Sergei Dytckov, Sushri Sunita Purohit, Masoud Daneshtalab, Juha Plosila, Hannu Tenhunen

Waleed W. Smari, Vesna Zeljkovic

High Performance Computing & Simulation, HPCS 2014

2014

Proceedings of the 2014 International Conference on High Performance Computing & Simulation (HPCS 2014)

693

696

4

978-1-4799-5312-7

DOIhttps://doi.org/10.1109/HPCSim.2014.6903756

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6903756

https://research.utu.fi/converis/portal/detail/Publication/2227404



The major bottleneck in simulation of large-scale neural networks is the communication problem due to one-to-many neuron connectivity. Network-on-Chip concept has been proposed to address the problem. This work explores the drawback that is introduced by interconnection networks – a delay jitter. The preliminary experiment is held in the spiking neural network simulator introducing variable communicational delay to the simulation. The performance degradation is reported.


Last updated on 2024-26-11 at 15:55