A4 Refereed article in a conference publication
Exploring NoC jitter effect on simulation of spiking neural networks
Authors: Sergei Dytckov, Sushri Sunita Purohit, Masoud Daneshtalab, Juha Plosila, Hannu Tenhunen
Editors: Waleed W. Smari, Vesna Zeljkovic
Conference name: High Performance Computing & Simulation, HPCS 2014
Publication year: 2014
Book title : Proceedings of the 2014 International Conference on High Performance Computing & Simulation (HPCS 2014)
First page : 693
Last page: 696
Number of pages: 4
ISBN: 978-1-4799-5312-7
DOI: https://doi.org/10.1109/HPCSim.2014.6903756
Web address : http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6903756
Self-archived copy’s web address: https://research.utu.fi/converis/portal/detail/Publication/2227404
The major bottleneck in simulation of large-scale neural networks is the communication problem due to one-to-many neuron connectivity. Network-on-Chip concept has been proposed to address the problem. This work explores the drawback that is introduced by interconnection networks – a delay jitter. The preliminary experiment is held in the spiking neural network simulator introducing variable communicational delay to the simulation. The performance degradation is reported.
Keywords:
jitter, network-on-chip, Neural network, self-organizing map (SOM)
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