Tero Säntti
D.Sc. (Tech.)
teansa@utu.fi Joukahaisenkatu 3-5 Turku |
FPGA, Space, Imaging, Radiation, Embedded Systems
D.Sc. (Tech.) in 2008, Microelectronics.
In addition to University stuff, I am also working in industry:
- Aboa Space Research Oy, Senior Engineer, Chairman of the Board
- Kovilta Oy, Lead FPGA Architect
All things related to FPGAs, and especially their use in space and/or in imaging.
- 2010 - 2012, FPGA Prototyping, (5 ECTS)
- 2009 - 2011 Sulautetut prosessorijärjestelmät (Embedded Processor Systems), (5 ECTS)
- 2005 - 2008 Mikroprosessoripohjaiset järjestelmät (Microprocessor Based Systems), (5 ECTS)
- 2007 Embedded Virtual Machines on FPGAs (6 / 3 ECTS), post-graduate level course
- 2006 Special Course on Floating Point Arithmetics, (3 ECTS)
- 2006 Special Course on External Funding, (2 ECTS)
Besides these, I have been participating in teaching of courses in electronics and related fields since 1998, first at Department of Applied Physics and later at Department of Information Technology, both in University of Turku. Most of these have been demonstrations and exercises. Courses include: Microprocessors, Digital Teaching Media, Analog Electronics II, Design of Electronic Equipment, Analog Electronics I, Multimedia Algorithms, LSI Circuit Design, Circuit Theory I and Basic Electronics.
- A novel hardware acceleration scheme for Java method callsCommunication scheme for an advanced Java co-processor (2008)
- IEEE International Symposium on Circuits and Systems. Proceedings
(A4 Refereed article in a conference publication ) - Comparative study of synthesis for asynchronous and synchronous cache controllersComparative study of synthesis for asynchronous and synchronous cache controllers (2006) Norchip Conference, 2006. 24th Tuominen J, Santti T, Plosila J
(A4 Refereed article in a conference publication ) - Architecture for an advanced Java co-processor (2006) Proceedings of the 24th IEEE Norchip Conference Tuominen J, Santti T, Plosila J
(A4 Refereed article in a conference publication ) - Instruction folding for an asynchronous Java co-processorReal time flow control for an advanced Java co-processor (2005) International Symposium on Signals, Circuits & Systems, ISSCS 2005 Santti T, Plosila J
(A4 Refereed article in a conference publication ) - (2005) International Symposium of System-on-Chip Santti T, Plosila J
(A4 Refereed article in a conference publication ) - Instruction folding for an asynchronous Java co-processorTowards a formal power estimation framework for hardware systems (2005) System-on-Chip, 2005. Proceedings. 2005 International Symposium on Santti T, Plosila J
(A4 Refereed article in a conference publication ) - Real time flow control for an advanced Java co-processor (2005) NORCHIP Conference, 2005. 23rd Santti T, Plosila J
(A4 Refereed article in a conference publication ) - (2005) Proceeding of IEEE 23rd Norchip Conference Santti T, Plosila JA4 Refereed article in a conference publication
- (2005) Tuominen J, Santti T, Plosila J
(D4 Published development or research report or study ) - Towards a formal power estimation framework for hardware systems (2005) System-on-Chip, 2005. Proceedings. 2005 International Symposium on Tuominen J, Santti T, Plosila J
(A4 Refereed article in a conference publication ) - (2004) Proceedings of IEEE Norchip 2004 Santti T, Plosila J
(A4 Refereed article in a conference publication )
