A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä

Digital column readout architectures for hybrid pixel detector readout chips




TekijätPoikela T, Plosila J, Westerlund T, Buytaert J, Campbell M, De Gaspari M, Llopart X, Wyllie K, Gromov V, Kluit R, Beuzekom M, Zappon F, Zivkovic V, Brezina C, Desch K, Fu Y, Kruth A

Julkaisuvuosi2014

JournalJournal of Instrumentation

Tietokannassa oleva lehden nimiJournal of Instrumentation

Vuosikerta9

Numero01

Sivujen määrä9

ISSN1748-0221

DOIhttps://doi.org/10.1088/1748-0221/9/01/C01007

Verkko-osoitehttp://stacks.iop.org/1748-0221/9/i=01/a=C01007


Tiivistelmä
In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 μ m . The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures.



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