A1 Refereed original research article in a scientific journal
A prototype hybrid pixel detector ASIC for the CLIC experiment
Authors: Valerio P, Alozy J, Arfaoui S, Ballabriga R, Benoit M, Bonacini S, Campbell M, Dannheim D, Gaspari MD, Felici D, Kulis S, Llopart X, Nascetti A, Poikela T, Wong WS
Publication year: 2014
Journal:Journal of Instrumentation
Journal name in sourceJournal of Instrumentation
Volume: 9
Issue: 01
Number of pages: 10
ISSN: 1748-0221
DOI: https://doi.org/10.1088/1748-0221/9/01/C01012
Web address : http://stacks.iop.org/1748-0221/9/i=01/a=C01012
Abstract
A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64 × 64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measurement of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.
A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64 × 64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measurement of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.
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