We recently mapped an algorithm for online learning of linear subspaces
using local learning rules to an analog array computing framework. In
this work we consider a simplified version of this algorithm which can
be realized as a mixed-mode computing array. This allows similar
learning results as the unmodified algorithm and is designed to allow
large-scale test circuit fabrication with commercially available
technologies. We demonstrate by numerical simulations of the mixed mode
learning system that less than ten-bit resolution in the considered
digital circuitry is sufficient for useful learning; such resolution
allows efficient implementation of the related analog computations. The
presented circuit has practical applications e.g. in signal
classification, adaptive compression, and compressive sensing in
low-power devices.