A Reliable and High-Performance Network-on-Chip Router Through Decoupled Resource Sharing

: Shahiri M, Valinataj M, Rahmani AM

: Smari, WW

: International Conference on High Performance Computing & Simulation

: 2016

: 2016 International Conference on High Performance Computing & Simulation (HPCS)

: 2016 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2016)

: 88

: 95

: 8

: 978-1-5090-2089-8

: 978-1-5090-2088-1

DOI: https://doi.org/10.1109/HPCSim.2016.7568320

: http://ieeexplore.ieee.org/document/7568320/

Sustaining the functionality of routers as the main building block of Networks-on-Chip is of great importance especially against different environmental effects. The crossbar switch and the input ports are two main units inside a router in which the latter including the virtual channel buffers has a higher failure probability because of consuming the largest portion of the router's area. In this paper, we present a fault tolerant router micro-architecture based on utilizing a decoupled resource sharing approach in input ports as well as a new fault tolerant crossbar switch. The proposed router tolerates multiple permanent faults in the input ports and the crossbar switch with a negligible hardware overhead. The results based on Silicon Protection Factor (SPF) show that the proposed router provides a higher degree of fault tolerance compared to previous designs while offering lower packet latency in mesh based networks.