A1 Refereed original research article in a scientific journal
A 5.3 pJ/op Approximate TTA VLIW Tailored for Machine Learning
Authors: Jukka Teittinen, Markus Hiienkari, Indrė Žliobaitė, Jaakko Hollmen, Heikki Berg, Juha Heiskala, Timo Viitanen, Jesse Simonsson, Lauri Koskinen
Publication year: 2017
Journal: Microelectronics Journal
Volume: 61C
First page : 106
Last page: 113
Number of pages: 8
ISSN: 0026-2692
eISSN: 0026-2692
DOI: https://doi.org/10.1016/j.mejo.2017.01.007
Web address : http://www.sciencedirect.com/science/article/pii/S0026269216303755
To achieve energy efficiency in the Internet-of-Things (IoT), more
intelligence is required in the wireless IoT nodes. Otherwise, the
energy required by the wireless communication of raw sensor data will
prohibit battery lifetime, the backbone of IoT. One option to achive
this intelligence is to implement a variety of machine learning
algorithms on the IoT sensor instead of the cloud. Shown here is
sub-milliwatt machine learning accelerator operating at the Ultra-Low
Voltage Minimum-Energy Point. The accelerator is a Transport Triggered
Architecture (TTA) Application-Specific Instruction-Set Processor (ASIP)
targeted for running various Machine Learning algorithms. The ASIP is
implemented in 28 nm FDSOI (Fully Depleted Silicon On Insulator) CMOS
process, with an operating voltage of 0.35 V, and is capable of
5.3pJ/cycle and 1.8nJ/iteration when performing conventional machine
learning algorithms. The ASIP also includes hardware and compiler
support for approximate computing. With the machine learning algorithms,
computing approximately brings a maximum of 4.7% energy savings.