Lauri Koskinen
Professor of Practice
lauri.koskinen@utu.fi +358 41 461 6166 Assistentinkatu 7 Turku ORCID-tunniste: https://orcid.org/0000-0002-5495-709X |
Asiantuntijuusalueet
System-on-Chip architecture: Low-power processing, Verification and sign off, Neuromorphic computing / CiM, On-chip security, Mixed-Mode Processing, Audio & Video analysis
Ultra-low-power digital design: Processor architecture / RISC-V, Sub- and near-threshold design, Library characterization
Semiconductor statistics
R&D Commercialization / IP protection
Semiconductor business development: Patenting, Marketing
Power management: Integrated DC-DC converters, LDOs
Project management / team lead
System-on-Chip architecture: Low-power processing, Verification and sign off, Neuromorphic computing / CiM, On-chip security, Mixed-Mode Processing, Audio & Video analysis
Ultra-low-power digital design: Processor architecture / RISC-V, Sub- and near-threshold design, Library characterization
Semiconductor statistics
R&D Commercialization / IP protection
Semiconductor business development: Patenting, Marketing
Power management: Integrated DC-DC converters, LDOs
Project management / team lead
Tutkimusyhteisö tai tutkimusaihe
Integrated circuits
Integrated circuits
Biografia
Wide expertise ranging from ultra-low-power aspects of deep submicron transistors to the high-level realization of various systems (microcontrollers, deep learning, wireless biomedical sensors, audio and video coders).
Proven track record in commercializing R&D
Excellent communication skills.
Wide range of research contacts from IC design to medical expertise.
Considerable skills in innovative project proposal drafting
Tutkimus
Energy Minimization in small to big systems using both conventional and unconventional methods.
Opetus
Processor architecture, Digital and mixed-mode IC design, modern EDA design flow
Julkaisut 
1/2
- Extreme Path Delay Estimation of Critical Paths in Within-Die Process Fluctuations Using Multi-Parameter Distributions (2023)
- Journal of Low Power Electronics and Applications
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation (2021)
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan (2020) 2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) Hiienkari Markus, Gupta Navneet, Teittinen Jukka, Simonsson Jesse, Turnquist Matthew, Eriksson Jonas, Anttila Risto, Myllynen Ohto, Rämäkkö Hannu, Mäkikyrö Sofia, Koskinen Lauri
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - Execution Frequency and Energy Optimization for DVFS-enabled, Near-threshold Processors (2020) 2020 10th International Conference on Advanced Computer Information Technologies (ACIT'2020) Mäkikyrö Sofia, Tuoriniemi Samuli, Anttila Risto, Koskinen Lauri
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - Reconfigurable Switched Capacitor DC-DC Converter for Improved Security in IoT Devices (2018) 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) Jevtic R., Ylitolva M., Koskinen L.
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - A 5.3 pJ/op Approximate TTA VLIW Tailored for Machine Learning (2017)
- Microelectronics Journal
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - A fully integrated 2:1 self-oscillating switched-capacitor DC-DC converter in 28 nm UTBB FD-SOI (2016)
- Journal of Low Power Electronics and Applications
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - A Performance Case-Study on Memristive Computing-in-Memory versus Von Neumann Architecture (2016) Proceedings Data Compression Conference Koskinen L, Tissari J, Teittinen J, Lehtonen E, Laiho M, Poikonen JH
(O2 Muu julkaisu ) - Implementing Minimum-Energy-Point Systems With Adaptive Logic (2016)
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - A Fully Integrated Self-Oscillating Switched-Capacitor DC-DC Converter for Near-Threshold Loads (2015) 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC) Matthew J. Turnquist, Markus Hiienkari Jani Mäkipää, Lauri Koskinen
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - A robust ultra-low voltage CPU utilizing timing-error prevention (2015)
- Journal of Low Power Electronics and Applications
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - Fully Integrated DC-DC Converter and a 0.4V 32-bit CPU with Timing-Error Prevention Supplied from a Prototype 1.55V Li-ion Battery (2015) 2015 Symposium on VLSI Circuits-Digest of Papers Turnquist M, Hiienkari M, Makipaa J, Jevtic R, Pohjalainen E, Kallio T, Koskinen L
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - K-means clustering in a memristive logic array (2015) 2015 IEEE 15TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO) Tissari J, Poikonen JH, Lehtonen E, Laiho M, Koskinen L
(B3 Vertaisarvioimaton artikkeli konferenssijulkaisussa) - Minimum-Energy Point Design in FDSOI Regular-V-t (2015) Koskinen L, Hiienkari M, Turnquist M, Flatresse P
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - Power Optimizations for Transport Triggered SIMD Processors (2015) Proceedings: 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) Joonas Multanen, Timo Viitanen, Henry Linjamäki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila,
Tommi Zetterman
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - Recursive Algorithms in Memristive Logic Arrays (2015)
- IEEE Journal of Emerging and Selected Topics in Circuits and Systems
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS (2014) IEEE Custom Integrated Circuits Conference (CICC) Markus Hiienkari, Jukka Teittinen, Lauri Koskinen, Matthew Turnquist, Mikko Kaltiokallio, Jani Mäkipää, Arto Rantala, Matti Sopanen
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - A cellular architecture for memristive stateful logic (2014)
- International Workshop on Cellular Nanoscale Networks and their Applications
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa) - A cellular computing architecture for parallel memristive stateful logic (2014)
- Microelectronics Journal
(A1 Vertaisarvioitu alkuperäisartikkeli tieteellisessä lehdessä ) - Battery Development for Ultra-Low-Voltage Systems (2014) Koskinen L, Hiienkari M, Kallio T, Pohjalainen E, Turnquist M
(A4 Vertaisarvioitu artikkeli konferenssijulkaisussa)
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