Jouni Isoaho
Professor
jisoaho@utu.fi +358 40 770 6547 Vesilinnantie 5 Turku |
https://sites.utu.fi/cyber/?lang=en
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- Hierarchical Agent Monitored Parallel On-Chip System: A Novel Design Paradigm and Its Formal Specification (2010)
- International Journal of Embedded and Real-Time Communication Systems
- Hierarchical Agent Monitoring Design Approach towards Self-Aware Parallel Systems-on-Chip (2010)
- ACM Transactions in Embedded Computing Systems
- Interconnection alternatives for hierarchical monitoring communication in parallel SoCs (2010)
- Microprocessors and Microsystems
- ITS Corridor of Cooperative Traffic ICT Project Report (2010)
- TUCS Publication Series
- Monitoring and Reconfiguration Techniques for Power Supply Variation Tolerant on-Chip Links (2010)
- IEEE International Symposium on Circuits and Systems. Proceedings
- Process Variation Tolerant On-Chip Communication Using Receiver and Driver Reconfiguration (2010) 11th IEEE International Symposium on Quality Electronic Design Nigussie E, Plosila J, Isoaho J
- High-speed completion detection for current sensing on-chip interconnects (2009)
- Electronics Letters
- Analysis of delay variation in encoded on-chip bus signaling under process variation (2008)
- VLSI Design
- AREA EFFICIENT DELAY-INSENSITIVE AND DIFFERENTIAL CURRENT SENSING ON-CHIP INTERCONNECT (2008) Proceedings of 2008 IEEE International SOC Conference Nigussie E, Plosila J, Isoaho J
- A software defined approach for common baseband processing (2008)
- Journal of Systems Architecture
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