Amleset Kelati
Ph.D. (Tech)

Department of Computing,, Smart Systems

amlkel@utu.fi




ORCID identifier: https://orcid.org/0000-0003-2357-1108





Areas of expertise
IoT, Security for Communications System, Machine Learning ,Smart gird , System-on-Chip, DSP, embedded system and Embedded HW security, Wireless communications systems, RFIC / ASIC / FPGA design, Verification and Integration,

Biography

Amleset Kealti (PH.D Tech), Postdoc, at the Departmennt of Computing, Electronics and smart system lab at the  University of Turku,  She is a senior hardware design engineer with over 20 years of experience. During this time, she has worked on numerous ASICs /FPGA IP developed and implemented top-down ASIC design flows for a number of companies. Her specialty is design tool integration and design tool flow automation by developing and integrating top-down design flows, he and has employed top-down design methodology for over 15 years and is proficient in VLSI  deisgn, Verilog, System Verilog, and VHDL, RTL veriication, GLS and synthesis.  

Dr. Amleset has graduated with PhD degree in Information and Communication Technology (ICT), Electronics systems (2021), and MSc degree with Electrical Engineer (2005), from Royal Institute of Technology (KTH), Stockholm, Sweden, MSc. in Digital communication systems Technology at Chalmers university technology, (2001), Chalmers university of technology, Gothenburg, Sweden, and received Master's degree from UCLV 1986 in Electronics Engineering.  Her research interests is Ultra-low power (ULP) wireless networked embedded processor for sensing systems, and processor for special purpose computing engines and sensor. Her research also includes ML algorithm HW implementation and design of multi-cores processors, GPUs, FPGAs. She is author and coauthors of 35 publications, and serves as a volunteer as IEEE officers.



Research

My postdoctoral research is in department of Astronomy, Finnish Centre for Astronomy with ESO. Her research focus is on implementation of wideband full-stokes spectrometer in FPGA /Casper "Collaboration for Astronomy Signal Processing and Electronic Research.  The implementation is needed for processing of large amount of data communication with high bandwith of the spectromrnter with cost performance. 

My PHD project belong to Department of Computing at smart systems unit ( IoT4Health). The main focus of the research is to develop architecture for Internet of Things (IoT) platform that can be used for monitoring e health by wearable’s and by Smart grid technology.  The tass is to develop the architecture and prototype but also design and implementations of reliable system for smat health and ambient assisting living.

​​​​​​​Publications:

Overview of publication records

No. of publications:    

35 published papers, 3 Thesis,  5 Journals, 1 book chapter  

(18 published as first author)

Total Number of citations h-index

100                                          8

https://scholar.google.com/citations?hl=en&user=VqRqmlcAAAAJ&view_op=list_works&sortby=pubdate




Teaching

Embedded Hardware Design in ASIC and FPGA, HDL, VHDL, Verilog , System Verilog

Digital Design, Machine Learning, Digital Signal Processing 



Publications
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Last updated on 2022-11-07 at 18:54