Juha Plosila
Head of the Robotics and Autonomous Systems Unit
juplos@utu.fi +358 29 450 2621 +358 50 383 9453 Vesilinnantie 5 Turku |
autonomous systems; robotics; unmanned vehicles; drones; embedded systems; cyber physical systems; internet of things; smart systems; fog/edge computing; multi-agent systems; multiprocessors; network on chip; system on chip; multiprocessor system on chip; chip multiprocessors; heterogeneous systems; reconfigurable computing; digital circuits and systems; formal methods
Autonomous Systems Laboratory (ASL): https://asl.utu.fi/
Dr. Juha Plosila (born 1965) is Professor (full) in autonomous systems and robotics and the head of the Autonomous Systems Laboratory (ASL) research group (https://asl.utu.fi/) and Smart Systems (formerly Embedded Electronics) cost centre at the University of Turku (UTU) Department of Computing (formerly Department of Future Technologies) since 2019. He received his PhD in electronics and communication technology from UTU in 1999 and his Adjunct Professor (Docent) title in digital systems design in 2006. He held a 5-year position of Academy Research Fellow (Academy of Finland) in 2006-2011 and served as a senior University Lecturer in embedded computing at UTU in 2011-2018. During his tenure at UTU since 2000, he has led many externally funded research projects, supervised more than 20 PhD theses, and served in the management committees of several master's programmes. Plosila has been an active participant in the European Institute of Innovation and Technology (EIT) knowledge and innovation community EIT Digital since 2011, leading the EIT Digital Master Programme in Embedded Systems (a European double-degree programme with 6 partner universities) and representing UTU in the EIT Digital Finland Node Strategy Committee.
Plosila's current research interests include intelligent adaptive and reconfigurable multi-processing platforms, self-aware multi-agent monitoring and control, machine-learning and optimization, as well as application of heterogeneous energy efficient architectures to new computational challenges in the areas of cyber-physical systems and internet-of-things, with a special focus on autonomous multi-robot systems and fog/edge computing. He also has a strong background in network-on-chip design and formal mehods for system design and verification.
Google Scholar statistics: https://scholar.google.com/citations?user=em4kCrUAAAAJ&hl=en
Lecturer for 18 different courses since 1999 in the fields of digital circuit and system design, multiprocessor architectures, computer architectures, reconfigurable computing, embedded systems, modelling and verification, as well as autonomous systems:
Autonomous Systems Architectures, MSc-level, 5 ECTS (2019- ); Regonfigurable Computing, MSc-level, 5 ECTS (at Fudan University, China, 2013- ); Processor Architectures, BSc-level, 5 ECTS (2020); Computer Architectures and Operating Systems, BSc-level, 4 ECTS (2017-2019), Multiprocessor Architectures, MSc-level, 5 ECTS, (2006, -08, -10, 2012-2018); System on Chip Design, MSc-level, 5 ECTS (2015-2016); Seminar on Embedded Computing, MSc/PhD-level, 5 ECTS (2012-2014); Modelling Parallel Systems, MSc-level (2011); Formal System Modelling and Verification, MSc-level, 5 ECTS, (2008, -10); Post Graduate Course on Digital Circuit & System Design, PhD-level; 5 ECTS (2009); Advanced Multiprocessor Systems, MSc-level, 5 ECTS (2009); System Verification, MSc-level, 5 ECTS (2007); Computer Architectures, BSc-level, 7 ECTS (2006-2007); Asynchronous System Design, MSc-level, 5 ECTS (2003, -05, -07); Formal System Specification and Design, MSc-level; 10 ECTS (2004, -06); Digital Integrated Circuit Design, BSc-level, 7 ECTS (2000-2005); Digital Systems Engineering, MSc-level, 10 ECTS (2001, -02, -04); Principles of Digital Design, BSc-level, 5 ECTS (1999-2000, -04).
- Adaptive Power Capping for Dark Silicon Many-Core Systems (2015)
- TUCS Publication Series
- A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips (2015) NOCS '15 Proceedings of the 9th International Symposium on Networks-on-Chip Mohammad Fattah, Antti Airola, Rachata Ausavarungnirun, Nima Mirzaei, Pasi Liljeberg, Juha Plosila, Siamak Mohammadi, Tapio Pahikkala, Onur Mutlu, Hannu Tenhunen
- Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs (2015)
- ACM Journal on Emerging Technologies in Computing Systems
- DyMeP: An infrastructure to support Dynamic Memory binding for runtime mapping in CGRAs (2015) Proceedings of the 28th International Conference on VLSI Design Tajammul MA, Jafri S, Ellerve P, Hemani A, Tenhunen H, Plosila J
- Dynamic Power Management for Many-Core Platforms in the Dark Silicon Era: A Multi-Objective Control Approach (2015) Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED) Amir-Mohammad Rahmani, Mohammad-Hashem Haghbayan, Anil Kanduri, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen
- FIST: A Framework to Interleave Spiking Neural Networks on CGRAs (2015) Parallel, Distributed and Network-Based Processing (PDP), 2015 23rd Euromicro International Conference on Tuan Ngyen, Syed M. A. H. Jafri, Masoud Daneshtalab, Ahmed Hemani, Sergei Dytckov, Juha Plosila, Hannu Tenhunen
- In-Order Delivery Approach for 2D and 3D NoCs (2015)
- Journal of Supercomputing
- Parallel Implementation of Fuzzified Pattern Matching Algorithm on GPU (2015) 2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing Shima Soroushnia, Masoud Daneshtalab, Tapio Pahikkala, Juha Plosila
- PDNOC: Partially Diagonal Network-on-chip for High Efficiency Multicore Systems (2015)
- Concurrency and Computation: Practice and Experience
- Power-Aware Online Testing of Manycore Systems in the Dark Silicon Era (2015) Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition Mohammad-Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Zainalabedin Navabi, Hannu Tenhunen
- Power Constrained Test Scheduling in NoC-Based Many-Core System with Advanced Power Management Features (2015) Mohammad-Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
- TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs (2015)
- Microprocessors and Microsystems
- Trio: A triple class on-chip network design for efficient multicore processors (2015) 2015 IEEE 12th International Conference on Embedded Software and Systems (ICESS) Thomas Canhao Xu, Ville Leppänen, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
- Using Ant Colony System to Consolidate VMs for Green Cloud Computing (2015)
- IEEE Transactions on Services Computing
- Utilization prediction aware VM consolidation approach for green cloud computing (2015) IEEE International Conference on Cloud Computing Fahimeh Farahnakian, Tapio Pahikkala, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
- VeloPix: the pixel ASIC Lfor the LHCb upgrade (2015)
- Journal of Instrumentation
- Active Suspension System for Heavy Vehicles (2014) 2014 International Symposium on Fundamentals of Electrical Engineering (ISFEE) Tahir A, Yasin J, Daneshtalab M, Plosila J
- Adaptive Load Balancing in Learning-based Approaches for many-core embedded systems (2014)
- Journal of Supercomputing
- Adjustable contiguity of run-time task allocation in networked many-core systems (2014) 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) Mohammad Fattah, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
- Artificial Immune System Based Intrusion Detection: Innate Immunity Using an Unsupervised Learning Approach (2014)
- International Journal of Digital Content Technology and Its Applications