A4 Article in conference proceedings
A cellular architecture for memristive stateful logic




List of Authors: Tissari Jari, Lehtonen Eero, Laiho Mika, Koskinen Lauri, Poikonen Jussi
Publication year: 2014
Book title *: 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), 2014
ISBN: 978-1-4799-6007-1
ISSN: 2165-0179

Abstract


In this paper, we present a CMOS/memristor hybrid architecture for massively parallel logic computations in a CMOL-type memristive memory. The considered architecture enables bit-parallel stateful logic operations, which can be used to efficiently implement vector computations. As examples of computing schemes that benefit from the considered processing architecture, we consider the implementation of a content-addressable memory and binary cellular automata. We verify the correct operation of the considered processing architecture and algorithms using HSPICE simulations.



Last updated on 2019-29-01 at 14:01