A4 Refereed article in a conference publication
An ECG Processor for the Detection of Eight Cardiac Arrhythmias with Minimum False Alarms
Authors: Sohail MA, Taufique Z, Abubakar SM, Saadeh W, Bin Altaf MA
Conference name: IEEE Biomedical Circuits and Systems Conference (BioCAS)
Publication year: 2019
Book title : 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS)
Journal name in source: 2019 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS 2019)
Journal acronym: BIOMED CIRC SYST C
Number of pages: 4
ISBN: 978-1-5090-0618-2
eISBN: 978-1-5090-0617-5
ISSN: 2163-4025
DOI: https://doi.org/10.1109/BIOCAS.2019.8919053
An Electrocardiography (ECG) based processor for eight Cardiac arrhythmias (CA) detection with smart priority logic is presented to minimize the false alarms. The processor utilizes a Multi-Level Linear Support Vector Machine (ML-LSVM) classifiers with one-vs-all approach to distinguish the different CAs. The classification is solely based on 5 features including R-wave, S-wave, T-wave, R-R interval and Q-S interval. The processor employs a priority logic to prioritize the detected conditions if more than one condition are detected. The system is implemented using CMOS 180nm with an area of 0.18mm2 and validated using 83 patient's recordings from Physionet Arrhythmia Database and Creighton University Database. The proposed processor consumes 0.91uW with an average classification accuracy of 98.5% while reducing the false alarms by 99%, which is 30% superior performance compared to conventional systems.
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