Execution Frequency and Energy Optimization for DVFS-enabled, Near-threshold Processors




Mäkikyrö Sofia, Tuoriniemi Samuli, Anttila Risto, Koskinen Lauri

IEEE

International Conference on Advanced Computer Information Technologies (ACIT)

2020

2020 10th International Conference on Advanced Computer Information Technologies (ACIT'2020)

2020 10TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER INFORMATION TECHNOLOGIES (ACIT)

518

522

5

978-1-7281-6759-6

978-1-7281-6760-2

DOIhttps://doi.org/10.1109/ACIT49673.2020.9208896



Shown here is an analysis algorithm targeted for near-threshold ultra-wide Dynamic Voltage and Frequency Scaling (UW-DVFS) embedded systems. The algorithm defines execution frequencies based on the software execution trace. Task execution profiling and constraints are used to form a linear optimization problem. Execution frequencies are defined based on the optimization result, the DVFS scaling factors. The system's DVFS overhead is measured and included in the model. The analyzed code is tested on a near-threshold ARM Cortex-M3 core with integrated PLL and power management. In this case, over 49% energy savings can be achieved for industry-standard speech-recognition software without any penalty in application throughput.



Last updated on 2024-26-11 at 11:13