A4 Refereed article in a conference publication
HiWA: A Hierarchical Wireless Network-on-Chip Architecture
Authors: Rezaei A, Safaei F, Daneshtalab M, Tenhunen H
Editors: Smari WW
Conference name: International Conference on High Performance Computing & Simulation (HPCS)
Publication year: 2014
Book title : 2014 International Conference on High Performance Computing & Simulation (HPCS
Journal name in source: 2014 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS)
First page : 499
Last page: 505
Number of pages: 7
ISBN: 978-1-4799-5313-4
DOI: https://doi.org/10.1109/HPCSim.2014.6903726
Abstract
Due to high latency and high power consumption in long hops between operational cores of NoCs, the performance of such architectures has been limited. In order to fill the gap between computing requirements and efficient communications, a new technology called Wireless Network-on-Chip (WNoC) has been emerged. Employing wireless communication links between cores, the new technology has reasonably increased the performance of NoC. However, wireless transceivers along with associated antenna impose considerable area and power overheads in WNoCs. Thus, in this paper, we introduce a hierarchical WNoC called Hierarchical Wireless-based Architecture (HiWA) to use the wireless resources optimally. In the proposed approach the network is divided into subnets where intra-subnet nodes communicate through wire links while inter-subnet communications are almost handled by single-hop wireless links. On top of that, we have also defined performance evaluation parameters. Simulation results show that the proposed architecture reduces average packet latency 16% and power consumption 14% in comparison with its conventional counterparts.
Due to high latency and high power consumption in long hops between operational cores of NoCs, the performance of such architectures has been limited. In order to fill the gap between computing requirements and efficient communications, a new technology called Wireless Network-on-Chip (WNoC) has been emerged. Employing wireless communication links between cores, the new technology has reasonably increased the performance of NoC. However, wireless transceivers along with associated antenna impose considerable area and power overheads in WNoCs. Thus, in this paper, we introduce a hierarchical WNoC called Hierarchical Wireless-based Architecture (HiWA) to use the wireless resources optimally. In the proposed approach the network is divided into subnets where intra-subnet nodes communicate through wire links while inter-subnet communications are almost handled by single-hop wireless links. On top of that, we have also defined performance evaluation parameters. Simulation results show that the proposed architecture reduces average packet latency 16% and power consumption 14% in comparison with its conventional counterparts.
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