Refereed article in conference proceedings (A4)
Dynamic Application Mapping Algorithm for Wireless Network-on-Chip
List of Authors: Rezaei A, Daneshtalab M, Zhao D, Safaei F, Wang XH, Ebrahimi M
Editors: Daneshtalab M, Aldinucci M, Leppanen V, Lilius J, Brorsson, M
Conference name: Euromicro international conference on parallel, distributed, and network-based processing
Publication year: 2015
Book title *: 23rd Euromicro international conference on parallel, distributed, and network-based processing (PDP 2015)
Journal name in source: 23RD EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2015)
Start page: 421
End page: 424
Number of pages: 4
ISBN: 978-1-4799-8491-6
ISSN: 1066-6192
DOI: http://dx.doi.org/10.1109/PDP.2015.14
Because of high bandwidth, low latency and flexible topology configurations provided by wireless NoC, this emerging technology is gaining momentum to be a promising future on-chip interconnection paradigm. However, congestion occurrence in wireless routers reduces the benefit of high speed wireless links and significantly increases the network latency; therefore, in this paper, a Dynamic Application Mapping Algorithm (HAMA) is introduced for wireless NoCs in order to reduce both internal and external congestion. DAMA has three key steps: finding the first node to map, choosing the first task to be mapped onto the first node, and allocation of the remaining tasks to the remaining nodes. Simulation results show significant gain in the mapping cost functions compared to state-of-the-art works.
