Instruction folding for an asynchronous Java co-processor

: Santti T, Plosila J

: N/A

: 2005

: System-on-Chip, 2005. Proceedings. 2005 International Symposium on

: 2005 International Symposium on System-On-Chip, Proceedings

: 18

: 21

: 4

: 0-7803-9294-9

DOI: https://doi.org/10.1109/ISSOC.2005.1595633

This paper presents a novel method for instruction folding in Java execution. The approach is to use an asynchronous co-processor for execution of Java bytecode. The folding is done in the same pipeline stage with instruction decoding. The co-processor is designed using asynchronous techniques to provide low power usage with reasonable performance. The co-processor can be used in a single CPU and single co-processor environment or in a network of multiple CPUs and co-processors. The co-processor does not need to know what kind of environment it is placed in, as all communication goes through an interface unit designed especially for that environment. This modularity of the design makes the co-processor more reusable and allows system level scalability. This work is a part of a project focusing on design of an advanced Java co-processor for Java intensive SoC applications.