A4 Vertaisarvioitu artikkeli konferenssijulkaisussa
HLS-DoNoC: High-Level Simulator for Dynamically Organizational NoCs
Tekijät: Guang L, Nigussie E, Plosila J, Isoaho J, Tenhunen H
Toimittaja: Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin
Julkaisuvuosi: 2012
Kokoomateoksen nimi: Proceedings of IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
Tietokannassa oleva lehden nimi: 2012 IEEE 15TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS)
Lehden akronyymi: DES DIAG ELEC CIRC S
Aloitussivu: 89
Lopetussivu: 94
Sivujen määrä: 6
ISSN: 2334-3133
DOI: https://doi.org/10.1109/DDECS.2012.6219031
Tiivistelmä
A high-level simulator is presented for the design and analysis of dynamically organizational Networks-on-Chip (DoNoCs). The DoNoC is able to organize statically or dynamically different network nodes for run-time coarse and fine grained reconfiguration, in particular power management. As an important step in the design flow, a simulator for early-stage design exploration is the focus of the paper. Built upon classic wormhole-based NoC architecture, the simulator is capable of experimenting diverse run-time monitoring and reconfiguration methods. In particular, dynamic clusterization can be performed with inter-cluster interfaces properly configured at the run-time. The simulator is flit-level accurate, trace-driven, and easy-to-reconfigure. It supports both synchronous and ratiochronous timing, and can provide the communication performance and power/energy consumption. The paper demonstrates the usage of the simulator in the design of various cluster-based power management schemes.
A high-level simulator is presented for the design and analysis of dynamically organizational Networks-on-Chip (DoNoCs). The DoNoC is able to organize statically or dynamically different network nodes for run-time coarse and fine grained reconfiguration, in particular power management. As an important step in the design flow, a simulator for early-stage design exploration is the focus of the paper. Built upon classic wormhole-based NoC architecture, the simulator is capable of experimenting diverse run-time monitoring and reconfiguration methods. In particular, dynamic clusterization can be performed with inter-cluster interfaces properly configured at the run-time. The simulator is flit-level accurate, trace-driven, and easy-to-reconfigure. It supports both synchronous and ratiochronous timing, and can provide the communication performance and power/energy consumption. The paper demonstrates the usage of the simulator in the design of various cluster-based power management schemes.
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