Exploring DRAM Last Level Cache for 3D Network-on-Chip Architecture




Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen

PublisherTrans Tech Publications

2011

Advanced Materials Research

403-408

4009

4018

10

978-3-03785-312-2

1022-6680

DOIhttps://doi.org/10.4028/www.scientific.net/AMR.403-408.4009




Last updated on 2024-26-11 at 20:39