A4 Refereed article in a conference publication

Local memory and logic arrangement for ultra-low power array processors

Authors: Ari Paasio

Conference name: IEEE International Symposium on Circuits and Systems

Publisher: Institute of Electrical and Electronics Engineers Inc.

Publication year: 2017

Book title : 2017 IEEE International Symposium on Circuits and Systems (ISCAS)

Journal name in source: Proceedings - IEEE International Symposium on Circuits and Systems

First page : 31

Last page: 34

Number of pages: 4

ISBN: 978-1-4673-6852-0

ISSN: 0271-4302

DOI: https://doi.org/10.1109/ISCAS.2017.8050224