In this paper we present a new architecture for thermometer-coded
digital-to-analog converters (DAC) that are used as a part of segmented
DACs. The size of the binary-to-thermometer decoder tends to grow
relatively large compared to the DAG when the number of input bits
increases. We propose an architecture that utilizes PMOS current source
transistor and moves the switching logic inside the current source cell
instead of using complex decoder logic. Our method reduces the layout
area in silicon significantly and scales modularly. Furthermore, we
analyse our design for static performance parameters DNL and INL by
using a circuit simulator.