A4 Vertaisarvioitu artikkeli konferenssijulkaisussa

A Novel Interlayer Bus Architecture for Three Dimensional Network-on-Chips




TekijätDaneshtalab M, Ebrahimi M, Liljeberg P, Tenhunen H

Julkaisuvuosi2010

JournalProceedings : Design, Automation, and Test in Europe Conference and Exhibition

Kokoomateoksen nimiProceeding of 3D Integration Workshop in Design Automation and Test Europe Conference (DATE)

ISSN1530-1591




Last updated on 2024-26-11 at 17:32