A Novel Interlayer Bus Architecture for Three Dimensional Network-on-Chips




Daneshtalab M, Ebrahimi M, Liljeberg P, Tenhunen H

2010

Proceedings : Design, Automation, and Test in Europe Conference and Exhibition

Proceeding of 3D Integration Workshop in Design Automation and Test Europe Conference (DATE)

1530-1591




Last updated on 2024-26-11 at 17:32