A Fault-Tolerant and Congestion-Aware Routing Algorithm for Networks-on-Chip




Valinataj M, Mohammadi S, Plosila J, Liljeberg P

PublisherIEEE

2010

Proc. of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)

139

144

6

978-1-4244-6613-9




Last updated on 2024-26-11 at 21:46