A4 Artikkeli konferenssijulkaisussa
Line detection on FPGA with parallel sensor-level segmentation

Julkaisun tekijät: Tero Säntti, Olli Lahdenoja, Ari Paasio, Mika Laiho, Jonne Poikonen
Julkaisuvuosi: 2014
Journal: International Workshop on Cellular Nanoscale Networks and their Applications
Kirjan nimi *: CNNA 2014
ISBN: 978-1-4799-6007-1
ISSN: 2165-0179


In this paper we describe the application of an embedded camera system consisting of a Vision Chip and an FPGA for fast line detection in industrial monitoring. The vision chip is used to perform low level image content reduction tasks where the result is a binary image consisting of e.g. edges in the image. In order to extract the equation of the dominant line from the Vision Chip output results, an FPGA auxiliary processor has been designed to perform the Hough transform for the binary result from the Vision Chip. The system is currently capable of achieving a 200-670fps line recognition speed using realistic input images. The achieved level of performance is sufficient for many industrial applications, e.g. in laser welding process for optical seam tracking. Because the Vision Chip operation is not affected by the Hough estimation, which is performed independently by the FPGA, other welding process analysis can be performed simultaneously at much higher frame rates (upto 10 000 fps demonstrated). The internal statistics of the Hough unit can also be used as feedback to enable parameter adjustment in the Vision Chip, yielding better end results.

Last updated on 2019-09-07 at 15:14