A1 Journal article – refereed
FPAA/Memristor Hybrid Computing Infrastructure




List of Authors: Mika Laiho, Jennifer Hasler, Jiantaoi Zhou, Chao Du, Wei Lu, Eero Lehtonen, Jussi Poikonen
Publication year: 2015
Journal: IEEE Transactions on Circuits and Systems I: Regular Papers
Volume number: 62
Issue number: 3
Number of pages: 10
ISSN: 1549-8328

Abstract


This paper presents a circuit in which tungsten oxide -based analog memristors are post-processed on a CMOS-based Field-Programmable Analog Array Integrated Circuit (FPAA-IC). FPAAs are powerful tools for rapid analog experimentation, prototyping and power-efficient computing, and they allow custom analog circuits to be built and reconfigured. The primary motivation for this work is to introduce and demonstrate the operation of the FPAA/memristor hybrid circuit and the board-level infrastructure, and to form a basis for subsequent empirical work on analog memristive computing. The experiments shown in this paper demonstrate a successful fabrication of memristors on the FPAA substrate, and the usefulness of the hybrid computing infrastructure in terms of experimentation with memristors. The experiments suggest that a single state variable cannot capture the adaptation of a memristor. To this end, a SPICE compatible memristor model with two state variables is presented. Furthermore, a memristor-based adaptive coincidence detector is demonstrated on the FPAA/Memristor computing infrastructure.


Last updated on 2019-14-06 at 12:50